1. Field of the Invention
The present invention relates to a boron phosphide-based semiconductor light-emitting device and to a method for producing the same. More particularly, the invention relates to a boron phosphide-based semiconductor light-emitting device exhibiting a low forward voltage or threshold voltage, having excellent reverse breakdown voltage characteristics, having a high emission intensity, and having a small decrease in emission intensity caused by long-term passage of device operation current. Furthermore, the invention relates to a method for producing the boron phosphide-based semiconductor light-emitting device and to a light-emitting diode comprising the boron phosphide-based semiconductor light-emitting device.
2. Description of the Related Art
A Group III nitride semiconductor has been conventionally employed for producing nitride semiconductor devices such as light-emitting diodes (abbreviated as LEDs) and laser diodes (abbreviated as LDs). See, for example, Isamu Akasaki, “Group III Nitride Semiconductor,” Dec. 8, 1999, first edition, Baifukan Co., Ltd., Chapters 13 and 14 (hereinafter referred to as “Non-Patent Document 1”). FIG. 1 shows a cross-section of a conventional and typical compound semiconductor LED fabricated from a stacked structure in which Group III nitride semiconductor layers are stacked on a crystalline substrate. Current Group III nitride semiconductor LEDs exclusively employ, as a substrate 101, sapphire (α-Al2O3 single crystal) or a silicon carbide (chemical formula: SiC) single crystal. On a surface of the substrate 101 is provided a lower cladding layer 102 for attaining “confinement” of light and carriers in a light-emitting layer 103. The lower cladding layer 102 is generally formed of a Group III nitride having a band gap wider than that of a material for forming the light-emitting layer 103; e.g., n-type aluminum gallium nitride (chemical formula: AlxGa1-xN: 0≦x≦1). See, for example, the aforementioned Non-Patent Document 1. The light-emitting layer 103 is stacked on the lower cladding layer 102. The light-emitting layer 103 is formed of a Group III nitride semiconductor layer having compositional proportions of component elements regulated so as to obtain a desired emission wavelength. For example, n-type gallium indium nitride having an appropriate indium (symbol of element: In) composition (chemical formula: GaxIn1-xN: 0≦x≦1) is generally employed for producing the light-emitting layer 103. See, for example, Japanese Patent Publication No. 55-3834. On the light-emitting layer 103, an upper cladding layer 106 formed of a Group III nitride semiconductor having a conduction type opposite to that of the lower cladding layer 102 is provided for exerting a “confinement” effect.
The light-emitting layer 103 is known to employ a quantum well structure for attaining light emission with a narrow half width in an emission spectrum and excellent monochromaticity. See, for example, Japanese Patent Application Laid-Open (kokai) No. 2000-133884. In a quantum well structure, a well layer 103a is generally formed of n-type GaxIn1-xN (0≦x≦1). Meanwhile, a barrier layer 103b, which is provided so as to attain “confinement” of light and carriers in the well layer 103a and attain joining to the well layer 103a, is formed of a Group III nitride semiconductor having a band gap wider than that of the well layer 103a. For example, the barrier layer is preferably formed of AlxGa1-xN (0≦x≦1). See Japanese Patent Application Laid-Open (kokai) No. 2000-133884. The quantum well structure forming the light-emitting layer 103 is known to be classified into two types; i.e., a single quantum well (abbreviated as SQW) structure containing only a single well layer 103a, and a multiple quantum well (abbreviated as MQW) structure having a plurality of well layers 103a produced by periodically and repeatedly stacking joined pairs each consisting of one well layer 103a and one barrier layer 103b. In this connection, the light-emitting layer 103 shown in FIG. 1 has an MQW structure produced by repeatedly stacking three joined pairs each consisting of one well layer 103a and one barrier layer 103b. 
As mentioned above, in a stacked structure 11 for producing conventional LEDs, an n-type conduction layer (specifically the lower cladding layer 102) is disposed on the substrate 101 side, and a p-type conduction layer serving as the upper cladding layer 106 is disposed on the surface side. Thus, the stacked structure is called a p-side-up structure. The p-side-up LED 10, which is a most typical example of Group III nitride semiconductor LEDs, is fabricated by forming a p-type Ohmic electrode 107 directly on the surface of the p-type upper cladding layer 106 so as to attain contact thereof with the layer. In order to form a p-type Ohmic electrode 107 having a low contact resistance, the p-type upper cladding layer 106 must be formed of a p-type conduction layer having high conductivity. The p-type upper cladding layer 106 has generally been conventionally formed of a GaN layer doped with magnesium (symbol of element: Mg). See the aforementioned Non-Patent Document 1. The Mg-doped GaN layer formed through vapor phase growth means has, however, high resistance in an as-grown state. Therefore, the vapor-phase-grown GaN layer must undergo cumbersome treatment such as annealing, or electron beam treatment in a vacuum, in order to form a p-type layer. See, for example, Japanese Patent Application Laid-Open (kokai) No. 53-20882, and Isamu Akasaki, “Group III-V Compound Semiconductor,” May 20, 1994, first edition, Baifukan Co., Ltd., Chapter 13. There is also disclosed a technique wherein a gallium arsenide nitride (chemical formula: GaAsN) mixed-crystal layer having a narrow band gap width is provided on the surface of the upper cladding layer 106 and an Ohmic electrode is provided so as to attain contact with the mixed-crystal layer. See, for example, Japanese Patent Application Laid-Open (kokai) No. 11-40890.
Boron monophosphide (chemical formula: BP) is known to be a type of Group III-V compound semiconductor. See P. Popper et al., “Boron phosphide, a III-V Compound of Zinc-Blende Structure,” (United Kingdom), Nature, May 25, 1957, No. 4569, p. 1075. Boron phosphide is an indirect-transition-type semiconductor exhibiting a relatively low efficiency of radiation recombination, which provides light emission. See K. Seeger (translated by Keiichi Yamamoto et al.), “Physics Library 61, Physics of Semiconductors (the second vol.),” 1st issue, published by Yoshioka Shoten, Jun. 25, 1991, p. 507. Therefore, a boron phosphide crystal layer has been conventionally employed not as an active layer but as another functional layer included in a semiconductor light-emitting device or a photo-detector. Specifically, a boron phosphide crystal layer having an n-conduction type (n-type boron phosphide crystal layer) has been employed as an element such as an n-type emitter layer of a hetero-bipolar transistor (HBT) or a window layer provided in a pn-junction silicon (Si) solar cell for transmitting sunlight. See Takao Takenaka et al., “Diffusion Layers Formed in Si Substrates during the Epitaxial Growth of BP and Application to Devices,” (US), Journal of Electrochemical Society, April, 1978, Vol. 125, No. 4, p. 633-637.
A p-type crystalline layer can be produced by doping a monomeric boron phosphide (chemical formula: BP)—a type of Group III-V compound semiconductor—with magnesium (Mg). See, for example, Japanese Patent Application Laid-Open (kokai) No. 2-288388. When a light-emitting device is fabricated from a p-type boron phosphide crystalline layer, the p-type Ohmic electrode is formed of a gold-zinc (Au-Zn) alloy. See, for example, Japanese Patent Application Laid-Open (kokai) No. 10-242569. According to a conventional technique, a p-type boron phosphide crystalline layer is formed through, for example, a metal-organic chemical vapor deposition method (MOCVD) means at a high temperature of 850° C. to 1,150° C. See, for example, Japanese Patent Application Laid-Open (kokai) No. 2-288388. Meanwhile, a practically employed temperature upon vapor phase growth of n-type GaxIn1-xN (0≦x≦1) serving as a well layer included in the aforementioned quantum well structure is as low as 600° C. to 850° C. See, for example, Japanese Patent Application Laid-Open (kokai) No. 6-260680. Such low temperature is employed because vaporization of indium (In) from n-type GaxIn1-xN (0≦x≦1) serving as a well layer, which is extremely thin, is prevented at such a temperature, thereby successfully providing a well layer having an aimed for indium composition.
Meanwhile, boron monophosphide tends to form a p-type conductive layer rather than an n-type conductive layer, because the effective mass of a hole is smaller than that of an electron. See Japanese Patent Application Laid-Open (kokai) No. 2-288388. In contrast to this, a Group III nitride semiconductor such as AlxGayInzN (0≦x, y, z≦1, x+y+z=1) tends to readily form an n-type conductive layer and encounters difficulty in forming a low-resistive p-type conductive layer in an as-grown state.
A conventional technique encounters difficulty in satisfactory formation of a low-resistive p-type boron phosphide crystal layer on an underlying layer such as a Group III nitride semiconductor layer. One known method for forming a boron phosphide crystal layer having a p-conduction type (p-type boron phosphide crystal layer) is the hydride VPE method, which employs sources such as diborane (molecular formula: B2H6) and phosphine (molecular formula: PH3). See Katsufusa Shohno, “Semiconductor Techniques (the first vol.),” 9th issue, University of Tokyo Press, Jun. 25, 1992, p. 76-77. In the hydride method, a p-type boron phosphide crystal layer can be formed through feeding of a boron source and a phosphorus source to a vapor phase growth zone by controlling a concentration ratio of a phosphorus source to a boron source; i.e., a V/III ratio, to a low ratio. See ibid. However, as the V/III ratio must be controlled to a low level as required by the method, a high-resistance poly-crystal such as BnP (7≦n≦10), which does not exhibit a semiconductor property, is formed, thereby causing difficulty in successful formation of a low-resistive p-type boron phosphide crystal layer. See ibid.
When such a conventional technique is employed, successful formation of a low-resistive p-type boron phosphide crystal layer, without being affected by the identity of underlying layer, tends to be difficult. In addition, in most cases, conventional techniques have employed a silicon (Si) single crystal as an underlying layer on which a p-type boron phosphide crystal layer is formed (see ibid). Heretofore, no technique has been reported for successfully forming a low-resistive p-type boron phosphide crystal layer on a crystalline underlying layer other than a silicon single crystal; e.g., an n-type Group III nitride semiconductor layer.